Digital signal processing functions may be implemented in silicon using a number of different processes or methodologies. The implementation of digital signal processing circuits such as digital filters, multipliers, and accumulators may be performed using one or more design building blocks or logic modules. These design building blocks or logic modules may comprise multi-operand adders and registers.
In many instances, the logic modules may not be optimally designed. For example, the overall chip area used to implement the logic module may be too large. In other instances, the overall processing delay associated with the components of the logic module may be suboptimal. Yet, in other instances, the power consumed by the logic module may be excessive for the digital signal processing functions implemented.
The limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with some aspects of the present invention as set forth in the remainder of the present application with reference to the drawings.